on-state current 8 amp fs08...d surface mount scr these series of s ilicon c ontrolled r ectifier use a high performance pnpn technology. these parts are intended for general purpose applications where high gate sensitivity is required using surface mount technology. dec - 02 absolute maximum ratings, according to iec publication no. 134 on-state current average on-state current non-repetitive on-state current non-repetitive on-state current fusing current peak reverse gate voltage peak gate current peak gate dissipation gate dissipation operating temperature storage temperature soldering temperature i t(rms) parameter conditions min. max. unit dpak (plastic) gate trigger current 0.5 to 15 ma off-state voltage 200 v ?600 v symbol i t(av) i tsm i tsm i 2 t v grm i gm p gm p g(av) t j t stg t sld 180?conduction angle, t c = 110 ? half cycle, q = 180 ? t c = 110 ? half cycle, 60 hz half cycle, 50 hz t p = 10ms, half cycle i gr = 10 ? 20 ? max. 20 ? max. 20ms max. 10s max. -40 -40 a a a a a 2 s v a w w ? ? ? 8 5 73 70 24.5 5 4 5 1 +125 +150 260 k a g a repetitive peak off state voltage parameter conditions voltage unit symbol v drm v rrm r gk = 1 k w b 200 v d 400 m 600
fs08...d surface mount scr dec - 02 fagor scr current case voltage sensitivity f s 08 08 b d 00 forming tr packaging electrical characteristics gate trigger current off-state leakage current on-state voltage gate trigger voltage gate non trigger voltage holding current parameter conditions sensitivity unit symbol i gt i drm v d = 12 v dc , r l = 33 w . t j = 25 ? ma 09 2 15 2 5 1.6 1.3 0.2 ma ? v v v min max max max max max min 50 70 max / i rrm v tm v gt v gd i h di / dt r th(j-a) critical rate of current rise thermal resistance junction-amb for dc ?/w v d = v drm , t j = 125 ? t j = 25 ? v r = v rrm , at i t = 16 amp, tp = 380 ?, t j = 25 ? i t = 100 ma , gate open tr 100 ns, f = 60 hz, t j = 125 ? v d = 12 v dc , r l = 33 w , t j = 25 ? v d = v drm , r l = 3.3k w , t j = 125 ? ma min a/? r d t j = 125 ? r d dynamic resistance max 46 m w 08 0.5 5 40 25 max i l ma50 30 latching current i g = 1.2 i gt v/? dv / dt critical rate of voltage rise v d = 0.67 x v drm , gate open min 150 50 20 r th(j-c) thermal resistance junction-case for dc ?/w v t0 t j = 125 ? threshold voltage max 0.85 v t j = 25 ? i g = 2 x i gt s = cooper surface under tab s = 0.5 cm 2
dec - 02 fig. 1: maximum average power dissipation versus average on-state current. fs08...d surface mount scr 0 2 10 8 6 4 2 0 4 6 p (w) i t(av) (a) 1 3 5 7 1.0 k = [zth(j-c) / rth (j-c)] fig. 3: relative variation of thermal impedance junction to case versus pulse duration. 1e-3 1e-2 1e-1 1e+0 tp (s) 0.5 0.2 0.1 a 360 fig. 2: average and d.c. on-state current versus case temperature. i t(av) (a) t case (?) 10 8 6 4 2 0 0 25 50 75 100 125 a = 180 d.c. i gt , i h (tj) / i gt , i h (tj = 25 ?) fig. 4: relative variation of gate trigger current, holding and latching current versus junction temperature. tj (?) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -40 -20 20 60 80 100 0 40 120 140 igt ih & il 1 10 100 1000 fig. 5: non repetitive surge peak on-state current versus number of cycles. 80 70 60 50 40 30 20 10 0 i tsm (a) number of cycles tj initial = 25 c f = 50 hz 300 1 10 i tsm (a). i 2 t (a 2 s) fig. 6: non repetitive surge peak on-state current for a sinusoidal pulse with width: tp < 10 ms, and corresponding value of i 2 t. tp(ms) 2 5 100 10 i tsm 20 50 i 2 t tj initial = 25 ?
dec - 02 fs08...d surface mount scr package mechanical data dpak to 252-aa a a1 b c c1 c2 d d1 e e1 e h l l1 l2 l3 l4 ref. dimensions milimeters min. nominal max. 2.18 0 0.64 0.46 0.46 5.97 5.21 6.35 5.20 9.40 1.40 2.55 0.46 0.89 0.64 2.3?.18 0.12 0.75?.1 0.8?.013 6.1?.1 6.58?.14 5.36?.1 2.28bsc 9.90?.15 2.6?.05 0.5?.013 1.20?.05 0.83?.1 2.39 0.127 0.89 0.61 0.56 6.22 5.52 6.73 5.46 10.41 1.78 2.74 0.58 1.27 1.02 marking: type number weight: 0.2 g 8 2
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